AMD announces production ramp of first 2 nm CPUs as Intel teases 10A and 7A chip roadmap
AMD has announced that its next-generation EPYC server processors, codenamed Venice, are now ramping production on TSMC’s 2 nm process technology. Production is underway at TSMC’s facilities in Taiwan with future expansion planned to the company’s Arizona fabrication plant. Venice utilizes AMD’s next-generation Zen 6 CPU architecture, which will also be shared with AMD’s upcoming desktop CPU family codenamed Olympic.
The announcement represents a significant milestone in semiconductor manufacturing advancement, with the industry pushing closer to atomic-scale transistor sizes. Intel has simultaneously teased potential future roadmaps for 10A and 7A nodes, signaling that the competitive race for process node leadership remains vigorous.
These developments suggest Moore’s Law—the observation that transistor density doubles roughly every two years—may yet have life remaining, despite decades of predictions about its inevitable end. The progression toward 2 nm and beyond demonstrates the industry’s continued ability to improve manufacturing efficiency and computational performance. For consumers, the successful production ramp of these server chips foreshadows improvements in future consumer-grade processors, promising enhanced computing performance in the coming years.